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This comment seems misleading to me, bit 0 of the `cr0` register enables protected mode, and that is its official name, is there a reason why it says "32 bit"? Sources: - [Intel manual](https://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-vol-3a-part-1-manual.pdf) page 78 - https://wiki.osdev.org/CPU_Registers_x86#CR0 |
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| .. | ||
| 32bit-main.asm | ||
| 32bit-switch.asm | ||
| README.md | ||
Concepts you may want to Google beforehand: interrupts, pipelining
Goal: Enter 32-bit protected mode and test our code from previous lessons
To jump into 32-bit mode:
- Disable interrupts
- Load our GDT
- Set a bit on the CPU control register
cr0 - Flush the CPU pipeline by issuing a carefully crafted far jump
- Update all the segment registers
- Update the stack
- Call to a well-known label which contains the first useful code in 32 bits
We will encapsulate this process on the file 32bit-switch.asm. Open it
and take a look at the code.
After entering 32-bit mode, we will call BEGIN_PM which is the entry point
for our actual useful code (e.g. kernel code, etc). You can read the code
at 32bit-main.asm. Compile and run this last file and you will see the two
messages on the screen.
Congratulations! Our next step will be to write a simple kernel