Commit Graph

2 Commits

Author SHA1 Message Date
Thomas Navennec
d58294dabe
cr0 "32bit bit" -> "protected mode" bit
This comment seems misleading to me, bit 0 of the `cr0` register enables protected mode, and that is its official name, is there a reason why it says "32 bit"?
Sources:
- [Intel manual](https://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-vol-3a-part-1-manual.pdf) page 78
- https://wiki.osdev.org/CPU_Registers_x86#CR0
2020-01-22 14:25:16 +01:00
Carlos Fenollosa
afa376d2b6 lessons 8, 9, 10, entering 32-bit mode 2014-10-09 11:38:11 +02:00