mirror of
https://github.com/cfenollosa/os-tutorial.git
synced 2024-10-27 20:34:19 +00:00
lesson 19, IRQs
This commit is contained in:
Carlos Fenollosa
parent
c8db77fea9
commit
c2a05935f8
46
19-interrupts-irqs/Makefile
Normal file
46
19-interrupts-irqs/Makefile
Normal file
@ -0,0 +1,46 @@
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C_SOURCES = $(wildcard kernel/*.c drivers/*.c cpu/*.c)
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HEADERS = $(wildcard kernel/*.h drivers/*.h cpu/*.h)
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# Nice syntax for file extension replacement
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OBJ = ${C_SOURCES:.c=.o cpu/interrupt.o}
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# Change this if your cross-compiler is somewhere else
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CC = /usr/local/i386elfgcc/bin/i386-elf-gcc
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GDB = /usr/local/i386elfgcc/bin/i386-elf-gdb
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# -g: Use debugging symbols in gcc
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CFLAGS = -g
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# First rule is run by default
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os-image.bin: boot/bootsect.bin kernel.bin
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cat $^ > os-image.bin
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# '--oformat binary' deletes all symbols as a collateral, so we don't need
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# to 'strip' them manually on this case
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kernel.bin: boot/kernel_entry.o ${OBJ}
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i386-elf-ld -o $@ -Ttext 0x1000 $^ --oformat binary
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# Used for debugging purposes
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kernel.elf: boot/kernel_entry.o ${OBJ}
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i386-elf-ld -o $@ -Ttext 0x1000 $^
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run: os-image.bin
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qemu-system-i386 -fda os-image.bin
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# Open the connection to qemu and load our kernel-object file with symbols
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debug: os-image.bin kernel.elf
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qemu-system-i386 -s -fda os-image.bin -d guest_errors,int &
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${GDB} -ex "target remote localhost:1234" -ex "symbol-file kernel.elf"
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# Generic rules for wildcards
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# To make an object, always compile from its .c
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%.o: %.c ${HEADERS}
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${CC} ${CFLAGS} -ffreestanding -c $< -o $@
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%.o: %.asm
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nasm $< -f elf -o $@
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%.bin: %.asm
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nasm $< -f bin -o $@
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clean:
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rm -rf *.bin *.dis *.o os-image.bin *.elf
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rm -rf kernel/*.o boot/*.bin drivers/*.o boot/*.o cpu/*.o
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34
19-interrupts-irqs/README.md
Normal file
34
19-interrupts-irqs/README.md
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@ -0,0 +1,34 @@
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*Concepts you may want to Google beforehand: IRQs, PIC, polling*
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**Goal: Finish the interrupts implementation and CPU timer**
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Remap the PIC
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-------------
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When the CPU boots, the PIC maps IRQs 0-7 to INT 0x8-0xF
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and IRQs 8-15 to INT 0x70-0x77. This conflicts with the ISRs
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we programmed last lesson. Since we programmed ISRs 0-31,
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it is standard to remap the IRQs to ISRs 32-47.
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The PICs are communicated with via I/O ports (see lesson 15).
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The Master PIC has command 0x20 and data 0x21, while the slave has
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command 0xA0 and data 0xA1.
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The code for remapping the PICs is obfuscated, so check
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[this article](http://www.osdev.org/wiki/PIC) if you're curious.
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Otherwise, just look at `cpu/isr.c`, new code after we set the IDT
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gates for the ISRs. After that, we add the IDT gates for IRQs.
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Now we jump to assembler, at `interrupt.asm`. The first task is to
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add global definitions for the IRQ symbols we just used in the C code.
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Look at the end of the `global` statements.
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Then, add the IRQ handlers. Same `interrupt.asm`, at the bottom. Notice
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how they jump to a new common stub: `irq_common_stub` (next step)
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We then create this `irq_common_stub` which is very similar to the ISR one.
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It is located at the top of `interrupt.asm`, and it also defines
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a new `[extern irq_handler]`
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Now back to C code.
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- Write the `irq_handler` in C:
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1
19-interrupts-irqs/boot
Symbolic link
1
19-interrupts-irqs/boot
Symbolic link
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../18-interrupts/boot/
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17
19-interrupts-irqs/cpu/idt.c
Normal file
17
19-interrupts-irqs/cpu/idt.c
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@ -0,0 +1,17 @@
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#include "idt.h"
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#include "../kernel/util.h"
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void set_idt_gate(int n, u32 handler) {
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idt[n].low_offset = low_16(handler);
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idt[n].sel = KERNEL_CS;
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idt[n].always0 = 0;
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idt[n].flags = 0x8E;
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idt[n].high_offset = high_16(handler);
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}
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void set_idt() {
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idt_reg.base = (u32) &idt;
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idt_reg.limit = IDT_ENTRIES * sizeof(idt_gate_t) - 1;
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/* Don't make the mistake of loading &idt -- always load &idt_reg */
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__asm__ __volatile__("lidtl (%0)" : : "r" (&idt_reg));
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}
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39
19-interrupts-irqs/cpu/idt.h
Normal file
39
19-interrupts-irqs/cpu/idt.h
Normal file
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#ifndef IDT_H
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#define IDT_H
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#include "types.h"
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/* Segment selectors */
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#define KERNEL_CS 0x08
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/* How every interrupt gate (handler) is defined */
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typedef struct {
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u16 low_offset; /* Lower 16 bits of handler function address */
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u16 sel; /* Kernel segment selector */
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u8 always0;
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/* First byte
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* Bit 7: "Interrupt is present"
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* Bits 6-5: Privilege level of caller (0=kernel..3=user)
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* Bit 4: Set to 0 for interrupt gates
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* Bits 3-0: bits 1110 = decimal 14 = "32 bit interrupt gate" */
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u8 flags;
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u16 high_offset; /* Higher 16 bits of handler function address */
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} __attribute__((packed)) idt_gate_t ;
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/* A pointer to the array of interrupt handlers.
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* Assembly instruction 'lidt' will read it */
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typedef struct {
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u16 limit;
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u32 base;
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} __attribute__((packed)) idt_register_t;
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#define IDT_ENTRIES 256
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idt_gate_t idt[IDT_ENTRIES];
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idt_register_t idt_reg;
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/* Functions implemented in idt.c */
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void set_idt_gate(int n, u32 handler);
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void set_idt();
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#endif
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425
19-interrupts-irqs/cpu/interrupt.asm
Normal file
425
19-interrupts-irqs/cpu/interrupt.asm
Normal file
@ -0,0 +1,425 @@
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; Defined in isr.c
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[extern isr_handler]
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[extern irq_handler]
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; Common ISR code
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isr_common_stub:
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; 1. Save CPU state
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pusha ; Pushes edi,esi,ebp,esp,ebx,edx,ecx,eax
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mov ax, ds ; Lower 16-bits of eax = ds.
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push eax ; save the data segment descriptor
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mov ax, 0x10 ; kernel data segment descriptor
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mov ds, ax
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mov es, ax
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mov fs, ax
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mov gs, ax
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; 2. Call C handler
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call isr_handler
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; 3. Restore state
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pop eax
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mov ds, ax
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mov es, ax
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mov fs, ax
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mov gs, ax
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popa
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add esp, 8 ; Cleans up the pushed error code and pushed ISR number
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sti
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iret ; pops 5 things at once: CS, EIP, EFLAGS, SS, and ESP
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; Common IRQ code. Identical to ISR code except for the 'call'
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; and the 'pop ebx'
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irq_common_stub:
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pusha
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mov ax, ds
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push eax
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mov ax, 0x10
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mov ds, ax
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mov es, ax
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mov fs, ax
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mov gs, ax
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call irq_handler ; Different than the ISR code
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pop ebx ; Different than the ISR code
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mov ds, bx
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mov es, bx
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mov fs, bx
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mov gs, bx
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popa
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add esp, 8
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sti
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iret
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; We don't get information about which interrupt was caller
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; when the handler is run, so we will need to have a different handler
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; for every interrupt.
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; Furthermore, some interrupts push an error code onto the stack but others
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; don't, so we will push a dummy error code for those which don't, so that
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; we have a consistent stack for all of them.
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; First make the ISRs global
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global isr0
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global isr1
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global isr2
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global isr3
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global isr4
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global isr5
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global isr6
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global isr7
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global isr8
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global isr9
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global isr10
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global isr11
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global isr12
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global isr13
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global isr14
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global isr15
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global isr16
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global isr17
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global isr18
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global isr19
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global isr20
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global isr21
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global isr22
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global isr23
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global isr24
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global isr25
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global isr26
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global isr27
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global isr28
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global isr29
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global isr30
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global isr31
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; IRQs
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global irq0
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global irq1
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global irq2
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global irq3
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global irq4
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global irq5
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global irq6
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global irq7
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global irq8
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global irq9
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global irq10
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global irq11
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global irq12
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global irq13
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global irq14
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global irq15
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; 0: Divide By Zero Exception
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isr0:
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cli
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push byte 0
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push byte 0
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jmp isr_common_stub
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; 1: Debug Exception
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isr1:
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cli
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push byte 0
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push byte 1
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jmp isr_common_stub
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; 2: Non Maskable Interrupt Exception
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isr2:
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cli
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push byte 0
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push byte 2
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jmp isr_common_stub
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; 3: Int 3 Exception
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isr3:
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cli
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push byte 0
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push byte 3
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jmp isr_common_stub
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; 4: INTO Exception
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isr4:
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cli
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push byte 0
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push byte 4
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jmp isr_common_stub
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; 5: Out of Bounds Exception
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isr5:
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cli
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push byte 0
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push byte 5
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jmp isr_common_stub
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; 6: Invalid Opcode Exception
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isr6:
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cli
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push byte 0
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push byte 6
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jmp isr_common_stub
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; 7: Coprocessor Not Available Exception
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isr7:
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cli
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push byte 0
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push byte 7
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jmp isr_common_stub
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; 8: Double Fault Exception (With Error Code!)
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isr8:
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cli
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push byte 8
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jmp isr_common_stub
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; 9: Coprocessor Segment Overrun Exception
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isr9:
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cli
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push byte 0
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push byte 9
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jmp isr_common_stub
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; 10: Bad TSS Exception (With Error Code!)
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isr10:
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cli
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push byte 10
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jmp isr_common_stub
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; 11: Segment Not Present Exception (With Error Code!)
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isr11:
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cli
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push byte 11
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jmp isr_common_stub
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; 12: Stack Fault Exception (With Error Code!)
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isr12:
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cli
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push byte 12
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jmp isr_common_stub
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; 13: General Protection Fault Exception (With Error Code!)
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isr13:
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cli
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push byte 13
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jmp isr_common_stub
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; 14: Page Fault Exception (With Error Code!)
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isr14:
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cli
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push byte 14
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jmp isr_common_stub
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; 15: Reserved Exception
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isr15:
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cli
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push byte 0
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push byte 15
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jmp isr_common_stub
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; 16: Floating Point Exception
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isr16:
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cli
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push byte 0
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push byte 16
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jmp isr_common_stub
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; 17: Alignment Check Exception
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isr17:
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cli
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push byte 0
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push byte 17
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jmp isr_common_stub
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; 18: Machine Check Exception
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isr18:
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cli
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push byte 0
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push byte 18
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jmp isr_common_stub
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; 19: Reserved
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isr19:
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cli
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push byte 0
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push byte 19
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jmp isr_common_stub
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; 20: Reserved
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isr20:
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cli
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push byte 0
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push byte 20
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jmp isr_common_stub
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; 21: Reserved
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isr21:
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cli
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push byte 0
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push byte 21
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jmp isr_common_stub
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; 22: Reserved
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isr22:
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cli
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push byte 0
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push byte 22
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jmp isr_common_stub
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; 23: Reserved
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isr23:
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cli
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push byte 0
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push byte 23
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jmp isr_common_stub
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; 24: Reserved
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isr24:
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cli
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push byte 0
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push byte 24
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jmp isr_common_stub
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; 25: Reserved
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isr25:
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cli
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push byte 0
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push byte 25
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jmp isr_common_stub
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; 26: Reserved
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isr26:
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cli
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push byte 0
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push byte 26
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jmp isr_common_stub
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; 27: Reserved
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isr27:
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cli
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push byte 0
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push byte 27
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jmp isr_common_stub
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; 28: Reserved
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isr28:
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cli
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push byte 0
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push byte 28
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jmp isr_common_stub
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; 29: Reserved
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isr29:
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cli
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push byte 0
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push byte 29
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jmp isr_common_stub
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; 30: Reserved
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isr30:
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cli
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push byte 0
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push byte 30
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jmp isr_common_stub
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|
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; 31: Reserved
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isr31:
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cli
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push byte 0
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push byte 31
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jmp isr_common_stub
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; IRQ handlers
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irq0:
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cli
|
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push byte 0
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push byte 32
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jmp irq_common_stub
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irq1:
|
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cli
|
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push byte 1
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push byte 33
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jmp irq_common_stub
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irq2:
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cli
|
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push byte 2
|
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push byte 34
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jmp irq_common_stub
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|
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irq3:
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cli
|
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push byte 3
|
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push byte 35
|
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jmp irq_common_stub
|
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|
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irq4:
|
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cli
|
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push byte 4
|
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push byte 36
|
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jmp irq_common_stub
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|
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irq5:
|
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cli
|
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push byte 5
|
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push byte 37
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jmp irq_common_stub
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|
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irq6:
|
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cli
|
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push byte 6
|
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push byte 38
|
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jmp irq_common_stub
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|
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irq7:
|
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cli
|
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push byte 7
|
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push byte 39
|
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jmp irq_common_stub
|
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|
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irq8:
|
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cli
|
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push byte 8
|
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push byte 40
|
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jmp irq_common_stub
|
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|
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irq9:
|
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cli
|
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push byte 9
|
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push byte 41
|
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jmp irq_common_stub
|
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|
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irq10:
|
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cli
|
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push byte 10
|
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push byte 42
|
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jmp irq_common_stub
|
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|
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irq11:
|
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cli
|
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push byte 11
|
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push byte 43
|
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jmp irq_common_stub
|
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|
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irq12:
|
||||
cli
|
||||
push byte 12
|
||||
push byte 44
|
||||
jmp irq_common_stub
|
||||
|
||||
irq13:
|
||||
cli
|
||||
push byte 13
|
||||
push byte 45
|
||||
jmp irq_common_stub
|
||||
|
||||
irq14:
|
||||
cli
|
||||
push byte 14
|
||||
push byte 46
|
||||
jmp irq_common_stub
|
||||
|
||||
irq15:
|
||||
cli
|
||||
push byte 15
|
||||
push byte 47
|
||||
jmp irq_common_stub
|
||||
|
||||
140
19-interrupts-irqs/cpu/isr.c
Normal file
140
19-interrupts-irqs/cpu/isr.c
Normal file
@ -0,0 +1,140 @@
|
||||
#include "isr.h"
|
||||
#include "idt.h"
|
||||
#include "../drivers/screen.h"
|
||||
#include "../kernel/util.h"
|
||||
#include "../drivers/ports.h"
|
||||
|
||||
isr_t interrupt_handlers[256];
|
||||
|
||||
/* Can't do this with a loop because we need the address
|
||||
* of the function names */
|
||||
void isr_install() {
|
||||
set_idt_gate(0, (u32)isr0);
|
||||
set_idt_gate(1, (u32)isr1);
|
||||
set_idt_gate(2, (u32)isr2);
|
||||
set_idt_gate(3, (u32)isr3);
|
||||
set_idt_gate(4, (u32)isr4);
|
||||
set_idt_gate(5, (u32)isr5);
|
||||
set_idt_gate(6, (u32)isr6);
|
||||
set_idt_gate(7, (u32)isr7);
|
||||
set_idt_gate(8, (u32)isr8);
|
||||
set_idt_gate(9, (u32)isr9);
|
||||
set_idt_gate(10, (u32)isr10);
|
||||
set_idt_gate(11, (u32)isr11);
|
||||
set_idt_gate(12, (u32)isr12);
|
||||
set_idt_gate(13, (u32)isr13);
|
||||
set_idt_gate(14, (u32)isr14);
|
||||
set_idt_gate(15, (u32)isr15);
|
||||
set_idt_gate(16, (u32)isr16);
|
||||
set_idt_gate(17, (u32)isr17);
|
||||
set_idt_gate(18, (u32)isr18);
|
||||
set_idt_gate(19, (u32)isr19);
|
||||
set_idt_gate(20, (u32)isr20);
|
||||
set_idt_gate(21, (u32)isr21);
|
||||
set_idt_gate(22, (u32)isr22);
|
||||
set_idt_gate(23, (u32)isr23);
|
||||
set_idt_gate(24, (u32)isr24);
|
||||
set_idt_gate(25, (u32)isr25);
|
||||
set_idt_gate(26, (u32)isr26);
|
||||
set_idt_gate(27, (u32)isr27);
|
||||
set_idt_gate(28, (u32)isr28);
|
||||
set_idt_gate(29, (u32)isr29);
|
||||
set_idt_gate(30, (u32)isr30);
|
||||
set_idt_gate(31, (u32)isr31);
|
||||
|
||||
// Remap the PIC
|
||||
port_byte_out(0x20, 0x11);
|
||||
port_byte_out(0xA0, 0x11);
|
||||
port_byte_out(0x21, 0x20);
|
||||
port_byte_out(0xA1, 0x28);
|
||||
port_byte_out(0x21, 0x04);
|
||||
port_byte_out(0xA1, 0x02);
|
||||
port_byte_out(0x21, 0x01);
|
||||
port_byte_out(0xA1, 0x01);
|
||||
port_byte_out(0x21, 0x0);
|
||||
port_byte_out(0xA1, 0x0);
|
||||
|
||||
// Install the IRQs
|
||||
set_idt_gate(32, (u32)irq0);
|
||||
set_idt_gate(33, (u32)irq1);
|
||||
set_idt_gate(34, (u32)irq2);
|
||||
set_idt_gate(35, (u32)irq3);
|
||||
set_idt_gate(36, (u32)irq4);
|
||||
set_idt_gate(37, (u32)irq5);
|
||||
set_idt_gate(38, (u32)irq6);
|
||||
set_idt_gate(39, (u32)irq7);
|
||||
set_idt_gate(40, (u32)irq8);
|
||||
set_idt_gate(41, (u32)irq9);
|
||||
set_idt_gate(42, (u32)irq10);
|
||||
set_idt_gate(43, (u32)irq11);
|
||||
set_idt_gate(44, (u32)irq12);
|
||||
set_idt_gate(45, (u32)irq13);
|
||||
set_idt_gate(46, (u32)irq14);
|
||||
set_idt_gate(47, (u32)irq15);
|
||||
|
||||
set_idt(); // Load with ASM
|
||||
}
|
||||
|
||||
/* To print the message which defines every exception */
|
||||
char *exception_messages[] = {
|
||||
"Division By Zero",
|
||||
"Debug",
|
||||
"Non Maskable Interrupt",
|
||||
"Breakpoint",
|
||||
"Into Detected Overflow",
|
||||
"Out of Bounds",
|
||||
"Invalid Opcode",
|
||||
"No Coprocessor",
|
||||
|
||||
"Double Fault",
|
||||
"Coprocessor Segment Overrun",
|
||||
"Bad TSS",
|
||||
"Segment Not Present",
|
||||
"Stack Fault",
|
||||
"General Protection Fault",
|
||||
"Page Fault",
|
||||
"Unknown Interrupt",
|
||||
|
||||
"Coprocessor Fault",
|
||||
"Alignment Check",
|
||||
"Machine Check",
|
||||
"Reserved",
|
||||
"Reserved",
|
||||
"Reserved",
|
||||
"Reserved",
|
||||
"Reserved",
|
||||
|
||||
"Reserved",
|
||||
"Reserved",
|
||||
"Reserved",
|
||||
"Reserved",
|
||||
"Reserved",
|
||||
"Reserved",
|
||||
"Reserved",
|
||||
"Reserved"
|
||||
};
|
||||
|
||||
void isr_handler(registers_t r) {
|
||||
kprint("received interrupt: ");
|
||||
char s[3];
|
||||
int_to_ascii(r.int_no, s);
|
||||
kprint(s);
|
||||
kprint("\n");
|
||||
kprint(exception_messages[r.int_no]);
|
||||
kprint("\n");
|
||||
}
|
||||
|
||||
void register_interrupt_handler(u8 n, isr_t handler) {
|
||||
interrupt_handlers[n] = handler;
|
||||
}
|
||||
|
||||
void irq_handler(registers_t r) {
|
||||
/* If the irq involves the slave (IRQ > 7), send an EOI to it */
|
||||
if (r.int_no >= 40) port_byte_out(0xA0, 0x20);
|
||||
port_byte_out(0x20, 0x20); /* Send EOI to master */
|
||||
/* Handle the interrupt in a more modular way */
|
||||
if (interrupt_handlers[r.int_no] != 0) {
|
||||
isr_t handler = interrupt_handlers[r.int_no];
|
||||
handler(r);
|
||||
}
|
||||
}
|
||||
88
19-interrupts-irqs/cpu/isr.h
Normal file
88
19-interrupts-irqs/cpu/isr.h
Normal file
@ -0,0 +1,88 @@
|
||||
#ifndef ISR_H
|
||||
#define ISR_H
|
||||
|
||||
#include "types.h"
|
||||
|
||||
/* ISRs reserved for CPU exceptions */
|
||||
extern void isr0();
|
||||
extern void isr1();
|
||||
extern void isr2();
|
||||
extern void isr3();
|
||||
extern void isr4();
|
||||
extern void isr5();
|
||||
extern void isr6();
|
||||
extern void isr7();
|
||||
extern void isr8();
|
||||
extern void isr9();
|
||||
extern void isr10();
|
||||
extern void isr11();
|
||||
extern void isr12();
|
||||
extern void isr13();
|
||||
extern void isr14();
|
||||
extern void isr15();
|
||||
extern void isr16();
|
||||
extern void isr17();
|
||||
extern void isr18();
|
||||
extern void isr19();
|
||||
extern void isr20();
|
||||
extern void isr21();
|
||||
extern void isr22();
|
||||
extern void isr23();
|
||||
extern void isr24();
|
||||
extern void isr25();
|
||||
extern void isr26();
|
||||
extern void isr27();
|
||||
extern void isr28();
|
||||
extern void isr29();
|
||||
extern void isr30();
|
||||
extern void isr31();
|
||||
/* IRQ definitions */
|
||||
extern void irq0();
|
||||
extern void irq1();
|
||||
extern void irq2();
|
||||
extern void irq3();
|
||||
extern void irq4();
|
||||
extern void irq5();
|
||||
extern void irq6();
|
||||
extern void irq7();
|
||||
extern void irq8();
|
||||
extern void irq9();
|
||||
extern void irq10();
|
||||
extern void irq11();
|
||||
extern void irq12();
|
||||
extern void irq13();
|
||||
extern void irq14();
|
||||
extern void irq15();
|
||||
|
||||
#define IRQ0 32
|
||||
#define IRQ1 33
|
||||
#define IRQ2 34
|
||||
#define IRQ3 35
|
||||
#define IRQ4 36
|
||||
#define IRQ5 37
|
||||
#define IRQ6 38
|
||||
#define IRQ7 39
|
||||
#define IRQ8 40
|
||||
#define IRQ9 41
|
||||
#define IRQ10 42
|
||||
#define IRQ11 43
|
||||
#define IRQ12 44
|
||||
#define IRQ13 45
|
||||
#define IRQ14 46
|
||||
#define IRQ15 47
|
||||
|
||||
/* Struct which aggregates many registers */
|
||||
typedef struct {
|
||||
u32 ds; /* Data segment selector */
|
||||
u32 edi, esi, ebp, esp, ebx, edx, ecx, eax; /* Pushed by pusha. */
|
||||
u32 int_no, err_code; /* Interrupt number and error code (if applicable) */
|
||||
u32 eip, cs, eflags, useresp, ss; /* Pushed by the processor automatically */
|
||||
} registers_t;
|
||||
|
||||
void isr_install();
|
||||
void isr_handler(registers_t r);
|
||||
|
||||
typedef void (*isr_t)(registers_t);
|
||||
void register_interrupt_handler(u8 n, isr_t handler);
|
||||
|
||||
#endif
|
||||
16
19-interrupts-irqs/cpu/types.h
Normal file
16
19-interrupts-irqs/cpu/types.h
Normal file
@ -0,0 +1,16 @@
|
||||
#ifndef TYPES_H
|
||||
#define TYPES_H
|
||||
|
||||
/* Instead of using 'chars' to allocate non-character bytes,
|
||||
* we will use these new type with no semantic meaning */
|
||||
typedef unsigned int u32;
|
||||
typedef int s32;
|
||||
typedef unsigned short u16;
|
||||
typedef short s16;
|
||||
typedef unsigned char u8;
|
||||
typedef char s8;
|
||||
|
||||
#define low_16(address) (u16)((address) & 0xFFFF)
|
||||
#define high_16(address) (u16)(((address) >> 16) & 0xFFFF)
|
||||
|
||||
#endif
|
||||
1
19-interrupts-irqs/drivers
Symbolic link
1
19-interrupts-irqs/drivers
Symbolic link
@ -0,0 +1 @@
|
||||
../18-interrupts/drivers/
|
||||
11
19-interrupts-irqs/kernel/kernel.c
Normal file
11
19-interrupts-irqs/kernel/kernel.c
Normal file
@ -0,0 +1,11 @@
|
||||
#include "../drivers/screen.h"
|
||||
#include "util.h"
|
||||
#include "../cpu/isr.h"
|
||||
#include "../cpu/idt.h"
|
||||
|
||||
void main() {
|
||||
isr_install();
|
||||
/* Test the interrupts */
|
||||
__asm__ __volatile__("int $2");
|
||||
__asm__ __volatile__("int $3");
|
||||
}
|
||||
30
19-interrupts-irqs/kernel/util.c
Normal file
30
19-interrupts-irqs/kernel/util.c
Normal file
@ -0,0 +1,30 @@
|
||||
#include "util.h"
|
||||
|
||||
void memory_copy(char *source, char *dest, int nbytes) {
|
||||
int i;
|
||||
for (i = 0; i < nbytes; i++) {
|
||||
*(dest + i) = *(source + i);
|
||||
}
|
||||
}
|
||||
|
||||
void memory_set(u8 *dest, u8 val, u32 len) {
|
||||
u8 *temp = (u8 *)dest;
|
||||
for ( ; len != 0; len--) *temp++ = val;
|
||||
}
|
||||
|
||||
/**
|
||||
* K&R implementation
|
||||
*/
|
||||
void int_to_ascii(int n, char str[]) {
|
||||
int i, sign;
|
||||
if ((sign = n) < 0) n = -n;
|
||||
i = 0;
|
||||
do {
|
||||
str[i++] = n % 10 + '0';
|
||||
} while ((n /= 10) > 0);
|
||||
|
||||
if (sign < 0) str[i++] = '-';
|
||||
str[i] = '\0';
|
||||
|
||||
/* TODO: implement "reverse" */
|
||||
}
|
||||
10
19-interrupts-irqs/kernel/util.h
Normal file
10
19-interrupts-irqs/kernel/util.h
Normal file
@ -0,0 +1,10 @@
|
||||
#ifndef UTIL_H
|
||||
#define UTIL_H
|
||||
|
||||
#include "../cpu/types.h"
|
||||
|
||||
void memory_copy(char *source, char *dest, int nbytes);
|
||||
void memory_set(u8 *dest, u8 val, u32 len);
|
||||
void int_to_ascii(int n, char str[]);
|
||||
|
||||
#endif
|
||||
Loading…
Reference in New Issue
Block a user